Product Summary
The XC2S100E-6PQG208C gives users high performance, abundant logic resources, and a rich feature set, all at an exceptionally low price. The seven-member family offers densities ranging from 50,000 to 600,000 system gates. Features include block RAM (to 288K bits), distributed RAM (to 221,184 bits), 19 selectable I/O standards, and four DLLs (Delay-Locked Loops). Fast, predictable interconnect means that successive design iterations continue to meet timing requirements.
Parametrics
XC2S100E-6PQG208C absolute maximum ratings: (1)VCCINT Supply voltage relative to GND: min=-0.5V, max=2.0V; (2)VCCO Supply voltage relative to GND: min=-0.5V, max=4.0V; (3)VREF Input reference voltage: min=-0.5V, max=4.0V; (4)VIN Input voltage relative to GND: min=-0.5V, max=4.0V; (5)VTS Voltage applied to 3-state output: min=-0.5V, max=4.0V; (6)TSTG Storage temperature (ambient): min=-65℃, max=+150℃; (7)TJ Junction temperature: max=+125℃.
Features
XC2S100E-6PQG208C features: (1)SelectRAM hierarchical memory: 16 bits/LUT distributed RAM; Configurable 4K-bit true dual-port block RAM; Fast interfaces to external RAM; (2)Fully 3.3V PCI compliant to 64 bits at 66 MHz and CardBus compliant; (3)Low-power segmented routing architecture; (4)Dedicated carry logic for high-speed arithmetic; (5)Efficient multiplier support; (6)Cascade chain for wide-input functions; (7)Abundant registers/latches with enable, set, reset.
Diagrams
Image | Part No | Mfg | Description | Pricing (USD) |
Quantity | |||||||
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XC2S100E-6PQG208C |
IC FPGA 1.8V 600 CLB'S 208-PQFP |
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Image | Part No | Mfg | Description | Pricing (USD) |
Quantity | |||||||
XC2S100 |
Other |
Data Sheet |
Negotiable |
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XC2S100-5FG256C |
IC FPGA 2.5V 600 CLB'S 256-FBGA |
Data Sheet |
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XC2S100-5FG256I |
IC FPGA 2.5V I-TEMP 256-FBGA |
Data Sheet |
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XC2S100-5FG456C |
IC FPGA 2.5V 600 CLB'S 456-FBGA |
Data Sheet |
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XC2S100-5FG456I |
IC FPGA 2.5V I-TEMP 456-FBGA |
Data Sheet |
Negotiable |
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XC2S100-5FGG256C |
IC SPARTAN-II FPGA 100K 256-FBGA |
Data Sheet |
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