XCV600E-6BG432I

programmable Gate Array, high-performance, high-capacity, –0.5 to 2.0 V

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Price:: US $20.00~26.00 / piece [Get Latest Price]

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PartNumber:: XCV600E-6BG432I

Brand:: Xilinx, Inc - Xilinx | Pack: BGA | D/C: 08+

Availability:: Supply Ability: 10000/Week Can Ship Immediately
Delivery: 10-15 Business Days (ships out within 3 Business days)

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Products Upload time: 2011-08-03

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Part Number:XCV600E-6BG432I
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Product Summary

The XCV600E-6BG432I is a high-performance, high-capacity programmable Gate Array. Dramatic increases in silicon efficiency result from optimizing the new architecture for place-and-route efficiency and exploiting an aggressive 6-layer metal 0.18 mm CMOS process. The XCV600E-6BG432I makes Virtex-E FPGAs powerful and flexible alternatives to mask-programmed gate arrays.

Parametrics

XCV600E-6BG432I absolute maximum ratings: (1)Internal Supply voltage relative to GND: –0.5 to 2.0 V; (2)Supply voltage relative to GND: –0.5 to 4.0 V; (3)Input Reference Voltage: –0.5 to 4.0 V; (4)Input voltage relative to GND: –0.5 to 4.0 V; (5)Voltage applied to 3-state output: –0.5 to 4.0 V; (6)Longest Supply Voltage Rise Time from 0 V - 1.71 V: 50 ms; (7)Storage temperature (ambient): –65 to +150 ℃; (8)Junction temperature(3) Plastic packages: +125 ℃.

Features

XCV600E-6BG432I features: (1)Fast, High-Density 1.8 V FPGA Family: Densities from 58 k to 4 M system gates, 130 MHz internal performance (four LUT levels), Designed for low-power operation, PCI compliant 3.3 V, 32/64-bit, 33/ 66-MHz; (2)Highly Flexible SelectI/O+ Technology: Supports 20 high-performance interface standards, Up to 804 singled-ended I/Os or 344 differential I/O pairs for an aggregate bandwidth of > 100 Gb/s; (3)Differential Signalling Support: LVDS (622 Mb/s), BLVDS (Bus LVDS), LVPECL, Differential I/O signals can be input, output, or I/O, Compatible with standard differential devices, LVPECL and LVDS clock inputs for 300+ MHz clocks.