(China (Mainland))
Product Summary
The XC2C512-10FTG256C delivers the high speed and ease of use associated with the XC9500/XL/XV CPLD family with the extremely low power versatility of the XPLA3 family in a single CPLD. Low power consumption and high-speed operation are combined into a single family that is easy to use and cost effective.
Parametrics
XC2C512-10FTG256C absolute maximum ratings: (1)VCC Supply voltage relative to GND: min=-0.5V, max=2.0V; (2)VI Input voltage relative to GND: min=-0.5V, max=4.0V; (3)TJ Maximum junction temperature: min=-40℃, max=150℃; (4)TSTR Storage temperature: min=-65℃, max=150℃.
Features
XC2C512-10FTG256C features: (1)Optimized for 1.8V systems: Industry fastest low power CPLD; Densities from 32 to 512 macrocells; (2)Industry best 0.18 micron CMOS CPLD: Optimized architecture for effective logic synthesis; Multi-voltage I/O operation-1.5V to 3.3V; (3)Design entry/verification using Xilinx and industry standard CAE tools; (4)Free software support for all densities using Xilinx WebPACK.
Diagrams
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 XC2C512-10FTG256C |
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IC CR-II CPLD 512MCELL 256-FBGA |
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IC CR-II CPLD 128MCELL 132CSBGA |
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